__A European Automotive RISC-V Hardware Platform__ - is a European research and innovation project developing a next-generation automotive hardware platform based on the open RISC-V instruction set architecture. The project brings together leading European companies and research organizations to develop processor cores, accelerators, interconnects, memory hierarchies, peripheral subsystems, and design tools for software-defined vehicles.
__Verification and Validation of Automated Systems Safety and Security__ - is an H2020 ECSEL JU project that aims to evaluate the state-of-the-art V&V methods and tools, and design a multi-domain framework to create a clear structure around the components and elements needed to conduct the V&V process.
__Lightweight computation for networks at the edge__ - is a H2020 european project aiming at investigating models for programming edge networks. An edge network is a large set of heterogeneous, loosely coupled computing nodes situated at the logical extreme of a network, including networks of Internet of Things and mobile devices. It currently produced 44 publications, 21 invited talks, and 4 events.